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* Power saving SLEEP mode
* Power saving SLEEP mode
* Low Voltage Detector
* Low Voltage Detector
** 8-level 2.9V â€âCœ 2.4V/4.35V - 3.3V detection
** 8-level 2.9V - 2.4V/4.35V - 3.3V detection
** 2.2V Low voltage reset
** 2.2V Low voltage reset
* Peripherals
* Peripherals

Aktuelle Version vom 2. Juli 2024, 19:51 Uhr

The GPLB33B, an 8-bit CMOS microprocessor, contains 1216 bytes working RAM, 64K bytes ROM, I/Os, interrupt/wakeup controller, and automatic display controller/driver for LCD. It also features one PWM driver with two audio channels to produce attractive sound effects easily. Its ROM area can be used to store both program and audio data. Furthermore, a SLEEP (power-down) function is also built in to extend power life. The GPLB33A is designed with state-of-the-art technology to fulfill LCD application needs, especially for hand-held products.

  • Built in 8-bit processor
    • 1216 bytes SRAM
    • 64K bytes ROM
    • Wide operating voltage range: 2.4V - 3.6V, 3.6V - 5.5V
    • Max. operating speed: 4.0MHz @ 2.4V - 3.6V, 5.0MHz @ 3.6V - 5.5V
    • CPU clock is software programmable, can be /1, /2, /4, /8, /16, /32, /64 R-oscillator clock frequency
    • Provides 6 wake-up sources
    • Provides 7 interrupt sources
  • Serial SRAM interface
  • Universal Asynchronous Receiver and Transmitter (UART)
  • Key scan function
    • SEG[15:0] can be used to send key scan output
  • Programmable LCD driver
    • Up to 52 segments, 16 commons, max 832 dots
    • 1/5 bias; 1/16 duty capability
    • 104 bytes dedicated LCD RAM
    • Built-in voltage regulator to generate VLCD for LCD driver
    • 32-level contrast control (2.45V ~ 5.75V, in 1/5 bias)
  • Power saving SLEEP mode
  • Low Voltage Detector
    • 8-level 2.9V - 2.4V/4.35V - 3.3V detection
    • 2.2V Low voltage reset
  • Peripherals
    • Max. 24 I/O pins (PA[7:0], PB[7:0], PC[7:0])
    • Dedicated I/Os: PA[0:6]
    • Shared pin I/Os:
      • PA[7] / SEG[51]
      • PB[0:7] / SEG[46:39]
      • PC[0:1] / SSRAM SCK, SDA
      • PC[2:3] / UART Tx/Rx
      • PC[4:5] / SEG[50:49] / Ext_I , Ext_ck
      • PC[6:7] / SEG[48:47]
    • 32.768KHz oscillator circuit for RTC
    • RC-oscillator (only one resistor is needed)
    • Two 16-bit re-loadable timer/counters
    • 8-bit DAC resolution, 2-channel PWM audio outputs
    • Watchdog Timer for reliable operation